Dr Saša Cvetković
Assistant Professor
Department of Information Technologies
Faculty of Technical Sciences Čačak1
University of Kragujevac
65, Svetog Save St.
32102 Čačak
Serbia
Phone: +381 032/302-716
Fax: +381 032/342-101
Office No: 239
Dr. Ir. Saša Cvetković
(cell) +381 65 2376202
E-mail: (work) sasa.cvetkovic@ftn.kg.ac.rs
https://orcid.org/my-orcid?orcid=0009-0007-2068-1391
https://www.linkedin.com/in/sascha-cvetkovic-phd-37260479/
I am a seasoned R&D professional with entrepreneurial spirit and 22 years of work experience in the Netherlands in complex multi-disciplinary environments of Phillips, Bosch and ASML, having had various roles: developer/researcher, architect, competence leader, team leader, project leader and group leader. Familiar with Software Development Life Cycle and Product Development Life Cycle, as well as versatile stakeholder and process landscapes. I also have extensive experience with regular customer interaction and joint development programs. Recently working in an Lola institute as a researcher in the area of bio-medical signal processing and data analysis and currently working full time as an Assistant Professor in Information Technology at a Faculty of Technical Sciences Čačak, Serbia.
Technical skills and tools
• Informatics, programming in various programming languages (e.g. Matlab, Simulink, C/C++, MathCad, Python), prototyping, performing experiments, analysis, simulations and (mathematical) modeling of physical systems, test design, database creation and manipulation.
• Data analysis, Statistics, Algorithm Development, Embedded Systems, (Real-Time) Signal Processing, Video Content Analysis, Computer Vision, Electrical engineering, Research.
• Jira, Git, Lean, Agile, Scrum, Kanban, DevOps, Risk Management, Requirements management, Continuous Improvement Process, Intellectual Property Management.
Personal skills
• People management with servant leadership style, coaching and developing people, teaching, giving trainings. Good stakeholder management and strong communication and presentation skills, experience with continuous improvement process and change management in organizations. Strong customer focus and powerful will, but also a flexibility and a capacity to understand both people and changing priorities in a dynamic environment.
• Strong analytical thinker with a vision, while having a pragmatic and pro-active attitude. Empathic, positive and supportive team player able to get things done. Highly-motivated, committed and self-operating, innovation and goal driven, motivator/multiplier, open minded, flexible.
Technical education
1) PhD, Eindhoven University of Technology
Eindhoven, The Netherlands
In parallel to work (2004-2011), I obtained a PhD degree at Fac. of Electrical Engineering, Signal Processing Systems department, Video Coding and Architectures group, under supervision of Prof. Dr. Ir. Peter H.N. de With (IEEE Fellow).
Check: https://www.tue.nl/en/our-university/departments/electrical-engineering/ and https://vca.ele.tue.nl/home
PhD topic: Optimization of Video Capturing and Tone Mapping in Video Camera Systems.
In mu academic experience, I have also written and read many scientific papers, performed proof reading for my colleagues, presented and defended various inventions and papers on a number of international conferences.
Award: Won Chester W. Sell award for the second best paper in IEEE Transactions on Consumer Electronics for year 2008.
2) Univ. of Belgrade, Faculty of Electrical Engineering
Belgrade, Serbia
During my studies (October 1995-June 2000, 10 semesters), I had 41 subjects with outstanding GPA 9.07 out of 10. We had a lot of mathematics, physics, electronics, programming and signal processing. Check: https://www.etf.bg.ac.rs/en
Selected projects:
- Global search techniques applied on the problems in Telecommunications (GA, SA and TS)
- Digital image processing for image enhancement and compression
Master Thesis: Multi-Carrier CDMA in Wireless Channels.
Work Experience
1. Faculty of Technical Sciences Cacak - Fakultet tehničkih nauka u Čačku
Assistant Professor, February 2024 - Present (1 year), Čačak, Centralna Srbija, Serbia
Professor and senior researcher in the area of information technology, signalprocessing, data science and analysis.Teaching activities at technical university.
Subjects thought:
2. Research and Development institute Lola
Senior Researcher, March 2023 - February 2024 (1 year), Belgrade, Serbia
Biomedical engineering and research: data analysis, algorithms and signalprocessing of biological signals and data. Focus on advancing technology andmedicine to develop new devices and equipment for improving human health.Latest work: https://www.mdpi.com/2436428
3. ASML
9 years 1 month
a) Team Leader Intel’s Node Transition Projects & sub-Competence Teamlead, R&D On Product Performance
March 2020 - March 2023 (3 years 1 month), Eindhoven, Nederland
In the role of a cluster team leader, I am leading an engineering team in theNetherlands and USA (~10 people, physicists, mathematicians, electrical andSW engineers). Our team is verifying real-life performance of ASML HW&SWdeliveries by means of (big) data analysis consultation services. Our goal isto reach and improve performance of Intel process towards agreed specs andfunctionalities via close collaboration with Intel’s Technology Development center in Hillsboro: the group of Dr. Mark C. Phillips, Intel Fellow, Director ofLithography Hardware and Solutions. Working on a range of Intel’s processingnodes through Node Transition Projects (NTP): Intel 20A, Intel 3, Intel 4 withTD in Hillsboro and P1272/1274 (14nm and 10nm) ramp up/ HVM projects inFab32 in Chandler Arizona. In the sub-competence team lead role, I am driving a team of ~15 engineerstowards competence roadmap of Application dependent and Intrafielddata analytics deliveries, as well as organizing weekly working sessions tobrainstorm and review analysis of team members towards improving quality ofdeliverables and define a way forward. I am also responsible that knowledgetransfers /learnings are documented and keeping sub-competence overviewand work load. Achieved results: building highly motivated people and teams that excel, yearafter year of successfully helping stakeholders and customers to reach theirroadmap goals.
b) Senior data analyst for Intel’s Node Transition Projects, R&D OnProduct Performance
August 2018 - March 2020 (1 year 8 months), Eindhoven, Netherlands
Support Intel Hillsboro technology development group of Dr. Mark Phillips in onproduct overlay challenges of the next nodes.Working in NTP project with Intel Hillsboro (RUNDA NDA agreement) as dataanalysts/scientist. I work with System Engineering (SE), customer and team toreach overlay KPI specs: I perform overlay data analysis to find a root causeof issues, propose solutions, drive development, communicate consequences(present analysis in internal and customer meetings, steer customer in theright direction by hi-quality analysis). I also support local Customer Supportorganization to improve their efficiency and effectivity. Next to this technical work, I also work as a Project Lead for TechnicalCompetence On product overlay performance. This is a WOW improvementproject focusing on resolving technical debt and improve tooling andmethodology needed for daily work in projects of OPO groups. Other side ofthe project is change management towards improving collaboration with otherdepartments by clearly defining interfaces, roles and responsibilities towardsbecoming more effective organization. Achieved results: highly satisfied SE and Intel customer; visible improvementsof WOW with increased employees and management satisfaction.
c) Senior Architect In-Device Metrology (IDM) on YS1375 tool
August 2017 - July 2018 (1 year), Eindhoven, North Brabant, Netherlands
As Project Architect, responsible for integration of IDM on YS1375 in houseand supporting HW upgrades at customers, including system qualification/ATP development.• Integration cross FC (eg. Sensing, Alignment, FAFI, …), rollout plan(EDS's/TPS/TAR), technical integration scheme, giving technical direction tostakeholders (team, PL's, CS, etc). Impact analysis and zero'th order estimatesof timings.• Drive delivery of new features, support integration of on-tool SW, supportalpha/beta testing• Keep performance and risk overview, define mitigation plans, performanceand issue breakdown.• Drive rollout at ACE factory (Linkou, Taiwan), drive for getting tools throughATP to meet SAT. Get mitigations in place to de-waiver performance issues.• Drive worldwide rollout at customers, passing SAT and customer specificsign-off tests.• Perform lessons learned sessions, find common issues at customers withroot cause. Build overview of field performance of tools per use case.Achieved results: Successful integration of YS1375 performance (ARO &CD)and several YS1250 field upgrades, with zero escalations.
d) Machine Overlay Specialist and Competence Leader Machine Overlayat ASML
March 2014 - August 2017 (3 years 6 months), Eindhoven, Netherlands
Within ASML, the sector Development & Engineering is responsible for thespecification and the design of the ASML products. The Overlay departmentis responsible for development, delivery, integration and qualification offunctional modules & machine/customer applications on spec, within time andbudget in the areas of machine overlay. Key methods: Mathematical modeling of physical systems, statistics andmodel verification. Tasks: Specify, test, and analyze overlay qualification and calibration testsand report on the results. Invent and design new calibration and qualificationmethods to improve overlay. Use statistical methods to show improvementsor issues. Support the internal and external customers in solving overlayissues. Contribute to ASML’s overlay roadmap. Base on insights and problems found, steer a team of multidisciplinary designers and representatives of othersectors, to improve overlay performance. Competence Leader Machine Overlay As a competence leader, I prepare and present mid/end year competencereviews, maintain competence roadmap with competence architect andorganize competence meetings for various overlay groups (machine overlayNXE, NXT, XT, reticles and wafers, OPO). Based on me@ASML feedback, I was appointed by GL to create a proposalon improving a way of working, competence management and learning in thegroup. I have interviewed 15+ stakeholders from various groups: PLs, TLs,Architects, SE and GLs, competence owners/leaders. I have gathered ideas,best practices and their views, and finally, I have defined an integral proposalof improvements, that is worked out in a roadmap with allocation of tasks.Next to this, I gave an official overlay course to new group members and other interested engineers.
4. Bosch Security Systems
11 years 6 months
a) Group and Team leader Algorithm Development
February 2011 - March 2014 (3 years 2 months), Eindhoven, Netherlands
• Cluster leader (group + team leader) of algorithm development in BoschSecurity Systems. • Team leader of global Bosch center of competence for camera algorithms(having team members from various business units: video systems,automotive and corporate research) • Member of the Extended Eindhoven R&D management team, humanresource responsibility for team resources (appraisals, staffing, personaldevelopment of team members, hiring, etc)• Delegate responsibilities in the team (resource assignment) and manageteam activities/monitor progress according to the operational priorities,coordinate peer reviews of team activities• (Technical) coach / leadership for team resources• Technically leading various (small) projects (incl. European subsidy projects,innovation projects, projects with internal/external customers, technical vendorcontacts, etc.)• Participate in project preparation and scoping activities, making resource andproject planning for the team, operational involvement in projects
• Coordinate training plans, knowledge transfers, and organize the processeswithin the team to acquire and maintain domain knowledge / competences• Responsible for integrating deliverables/SW components from two Germanteams, with our deliverables. Cooperating with teams from China and Taiwanon work outsourcing. • Responsible for WOW/quality of work within team and (cross-) teamimprovements. E.g. with SW and testing groups, we have created a holisticWOW that has enabled much reduced development time and improvedquality. Managerial results:• Built a good team that delivers on time, with continuous innovation andimprovement focus.• Managed to shorten development time of algorithms and tuning for newcamera types for more than 60%, and a whole cameras development process(incl. making SW and testing) for more than 50%.
b) Image, Video and Signal Processing Algorithm Developer
October 2002 - February 2011 (8 years 5 months), Eindhoven, Netherlands
Technical accent of my work was to:
• Develop novel algorithms, image/signal processing functions, image pipelinedesigns that will be trend setting and that will ensure that we maintain strong,leading market position worldwide
• Follow technology trends, visit conferences, establish cooperation withUniversities, research institutes and companies (business development), toe.g. buy in novel algorithms. Maintain competences and constant flow of newideas for our products.
I was working on algorithm development for high-end video cameras, whichshould provide excellent images/video in all imaging conditions/applications.Bosch is recognized in the market as leader in image/video quality forsecurity applications, and I have strongly contributed to this success. Iworked in multi-discipline environment on all important development aspects:problem analysis, simulations, algorithm development, testing, integration,productization, new product development and innovations, etc. Several patentswere granted to me for various algorithms. The algorithms that I have designedand developed have all been implemented in SW or ICs/FPGA’s and used invarious cameras
c) Intellectual Property management (August 2001 – April 2014)
As part of my regular research/development work, I have performed patentresearch, checked clearance and assessed the patent portfolio of companiesto foresee possible legal issues. I have also written drafts of all my patents,and have cooperated with BOSH patent Office and patent attorneys inStuttgart, to bring them to the final patent texts.
5. Philips
Image, Video and Signal Processing Algorithm Developer
August 2001 - October 2002 (1 year 3 months), Eindhoven, Netherlands
Developing various image/video processing algorithms.
Selected papers and patents
International Patents
Projects
1. PANORAMA Ultra Wide Context Aware Imaging ENIAC Call 2012-2015. panorama-project.eu
2. CANDELA (ITEA 02013) Video content analysis and networked delivery architectures, July 2003 – June 2005, https://itea4.org/project/candela.html